בס"ד
David M. Miller
Ramat Bet Shemesh, Israel
Home: 077-2007262
e-mail: [Send email using form at bottom]

Software engineer with eight years experience in RTL functional verification
using Specman and Verilog. Also 13 years experience in s/w development
for the semiconductor industry. Enjoys programming in C/C++, Java,
Fortran as well as Tcl/Tk, Perl and Python and assembler.
Experience Verification Engineer

Nov 2006–Jan 2009 Hi-Tech Company Tel Aviv area, Israel
Developed RTL verification environments for Broadband modem for
module and full chip levels.

Dec 2005-Oct 2006 Intrinsix (consultant) Kibbutz Shaalabim, Israel
Developed RTL verification environments for various companies( including
Winbond and Comsys).

Sep 2004–Nov 2005 Intel (consultant) Jerusalem, Israel
Worked as contractor and developed RTL verification environment for
DMA.

Oct 1999–July 2004 Alvarion, Inc. Tel Aviv, Israel
Developed RTL verification environments for WiFi ASIC for the module
and full chip levels.

Software Engineer
Oct 1997–Sept 1999 Motorola Israel Ltd Tel Aviv, Israel
Group leader of software development group. Lead development of GUI, batch
processing operations and interpreter for CDMA fixed wireless terminal
(FWTs). Used Roguewave C++ lib and GUI builder with Use cases and OOD
methodologies.

Senior Associate Engineer
June 1984–June 1997 IBM Microelectronics Division Essex Junction, VT
Circuit Verification
Team leader of ASIC s/w tools development group. Developed Silicon
compilers, lexer analyzers and other applications.
Equipment Engineering
Developed control and measurement s/w for SEM metrology tool.

Associate Engineer
BEOL Memory Characterization
Supported M2FET DRAM defect diagnostics and product
characterization software

Education University of Pittsburgh Pittsburgh, PA
M.S. in EE/Biomedical engineering
Thesis involved the display of three-dimensional, cerebral blood flow
maps.
Carnegie-Mellon University Pittsburgh, PA
B.S. in mathematics/statistics

References Will be made available upon request